The present invention relates to a semiconductor device of a MOS structure having a p-type gate electrode and a method of manufacturing the same.
The most popular structure of the existing LSIs is a CMOS structure in which a p-channel MOS field effect transistor (FET) and an n-channel MOSFET are formed on a single substrate. The gate electrodes of these transistors used in this LSI consist of n-type polysilicon. A difference in work function between such a gate electrode and the substrate is about 1 eV for the n-channel MOSFET and is about 0 eV for the p-channel MOSFET. For this reason, a difference of 1 V or more is formed between the threshold voltages of these MOSFETs. As a result, the power source margin at the time of design is undesirably reduced.
In order to reduce the above threshold voltage difference, the p-channel MOSFET has a buried channel structure wherein its channel region is formed slightly inside the surface of the substrate. Even if the buried channel structure is used, however, the threshold voltage of the p-channel MOSFET cannot be perfectly set to be equal to that of the n-channel MOSFET. In addition, the buried channel has a disadvantage in formation of a short channel.
In order to solve these problems and cope with a future high-density, low-voltage LSI, minimum requirements required for a gate electrode of a p-channel MOSFET are three indispensable conditions as follows: (1) the work function of a portion contacting a gate insulator is about 5 eV; (2) the entire gate electrode has a low resistance; and (3) The gate structure must be compatible with the state-of-the-art fabrication process. When these points are taken into consideration, a gate electrode comprising boron-doped polysilicon and a low-resistance metal silicide film formed on this polysilicon is most promising.
When a gate electrode consists of boron-doped polysilicon, boron atoms are diffused fast in a silicon oxide film used as a gate insulator. The boron atoms are diffused from the gate electrode to the substrate in annealing performed upon formation of the gate electrode, and the threshold voltage of the resultant transistor undesirably varies. In particular, diffusion of the boron atoms is accelerated in an atmosphere containing hydrogen or steam, and the threshold voltage of the transistor varies even in relative low-temperature annealing. This mechanism will be described with reference to the drawings.
FIG. 14 shows the diode capacitance vs. gate voltage characteristics of a MOS diode having a gate electrode consisting of polysilicon doped with only boron. The capacitance is plotted along the ordinate, and the gate voltage is plotted along the abscissa in FIG. 14. The atmosphere during annealing is an oxygen atmosphere containing steam, and annealing time is 30 minutes. Other conditions are given such that the thickness of a gate oxide film is 3.5 nm, a layer doped with an n-type impurity is not present, a diode area is 10.sup.-4 cm.sup.2, a substrate impurity concentration is 3.times.10.sup.15 cm.sup.-3, a characteristic curve c obtained by only activation annealing (700.degree. C.; 30 minutes; dry nitrogen atmosphere) as a reference in addition to characteristic curves a and b obtained by annealing at temperatures of 850.degree. C. and 800.degree. C.
Referring to FIG. 14, in the characteristic curve c obtained by only activation annealing, characteristics on the positive inversion side of the gate voltage coincide with theoretical values. However, when annealing is performed at temperatures of 800.degree. C. or more, as indicated by the characteristic curves a and b, the threshold voltage is shifted to a higher voltage, thus indicating that boron is diffused in the substrate. This diffusion influence of boron is increased when the thickness of the gate oxide film is reduced.
In order to solve the above problem, (a) the annealing process is limited; (b) a gate insulator which suppresses boron diffusion is used; and (c) boron diffusion in the gate electrode is suppressed. The countermeasure (a) imposes large limitations on the fabrication process. In the countermeasure (b), use of silicon nitride as all or part of the gate insulator has been taken into consideration. However, at present, any material which can cope with a silicon oxide film is not practically proposed as far as MOS characteristics such as interface state, charge trap, and leakage current are concerned. According to the present invention, therefore, a means for suppressing boron diffusion in the gate electrode in the countermeasure (c) is employed.